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ARM Announces 10FF "Artemis" Test Chip

ARM Announces 10FF “Artemis” Test Chip

Today in collaboration with TSMC, ARM’s physical IP division is announcing the tapeout of a 10nm test chip demonstrating the company’s readiness for the new manufacturing process. The new test chip is particularly interesting as it contains ARM’s yet-to-be-announced “Artemis” CPU core. ARM discloses that tapeout actually took place back in December 2015 and is expecting silicon to come back from the foundry in the following weeks. 

The test chip serves as a learning platform for both ARM and TSMC in tuning their tools and manufacturing process to achieve the best results in terms of performance, power, and area. ARM actually implemented a full 4-core Artemis cluster on the test chip which should serve as a representative implementation of what vendors are expected to use in their production designs. The test chip also harbours a current generation Mali GPU implementation with 1 shader core that serves as a demonstration of what vendors should expect when choosing ARM’s POP IP in conjunction with its GPU IP. Besides the CPU and GPU we find also a range of other IP blocks and I/O interfaces that are used for validation of the new manufacturing process.

TSMC’s 10FF manufacturing process primarily promises a large improvement in density with scalings of up to 2.1x compared to the previous 16nm manufacturing node. At the same time, the new process is able to achive 11-12% higher performance at each process’ respective nominal voltage, or a 30% reduction in power at the same frequency.

In terms of a direct comparison between a current Cortex A72 design on 16FF+ and an Artemis core on 10FF on the preliminary test chip with an early physical design kit (PDK) we see that the new CPU and process are able to roughly halve the dynamic power consumption. Currently clock frequencies on the new design still don’t reach what is achievable on the older more mature process and IP, but ARM expects this to change in the future as it continues to optimise its POP and the process stabilises.

As manufacturing processes increasingly rise in their complexity, physical design implementation becomes an increasingly important part of CPU and SoC designs. As such, tools such as ARM’s POP IP become increasingly important for vendors to be able to achieve a competitive result both in terms of PPA and time-to-market of an SoC. Today’s announcement serves as demonstration of ARM commitment to stay ahead of the curve in terms of enabling its partners to make the best out of the IP that they license.

Intel Releases BIOS Version 0044 for Skylake NUCs

Intel Releases BIOS Version 0044 for Skylake NUCs

BIOS updates for motherboards and mini-PCs aren’t usually important enough to warrant explicit coverage. However, Intel’s latest release for the Skylake NUCs (the Core i3 and Core i5 versions – NUC6i3SYK, NUC6i3SYH, NUC6i5SYK and NUC6i5SYH) deserves special mention for a number of fixes that have been made.

Intel’s launch of the Skylake NUCs was quite muted, with review units making it to the press a few months after market availability. In the meanwhile, consumers were beset with problems ranging from memory incompatibility issues and Wi-Fi flakiness to unexplained BSODs. We encountered a bunch of these in our own review, and went to the extent of recommending the unit only if the reader wanted to be a beta-tester for Intel.

Fortunately, Intel has been hard at work to get to the bottom of all the reported problems. The last two BIOS releases (0042 and 004) have solved a number of serious issues, including, but not restricted to:

  • Improved electrical overstress protection in the voltage regulator circuitry – this was the reason for BSODs with WHEA_UNCORRECTABLE_ERROR reports.
  • Changed default value for Round Trip Latency to Enabled – this was the reason for incompatibility with some memory modules fabricated by SKHynix.
  • Improved BIOS update function to disable keyboard and power button during flash/recovery process – this could have helped me in avoiding the bricking of our first review sample of the NUC6i5SYK.
  • Fixed issue where Wi-Fi access point occasionally drops out during warm boot – this solves the strange case of the missing 5GHz SSID upon restarting the NUC
  • Changed FITC setting, OPI Link Speed to GT4 – this is the performance fix for PCIe 3.0 x4 NVMe SSDs

If you are facing issues with a Skylake NUC, updating to BIOS v0044 should resolve almost all of the problems. Readers curious about the OPI link speed and its effect on the performance and power consumption characteristics of a Skylake-U system can peruse our detailed coverage posted last week.

Note that the OPI link rate changes can only be realized using the Recovery BIOS update method (using the jumpers). Intel indicated that the new BIOS installs and functions without doing the Recovery BIOS update, but it will not make the changes needed for the OPI link rate fix. The required changes are not in the portions of the BIOS that are replaced during a normal BIOS update. After the update, it is also necessary to set BIOS system defaults by pressing the F9 function key

 

The NVIDIA GeForce GTX 1080 Preview: A Look at What’s to Come

Earlier this month NVIDIA announced their latest generation flagship GeForce card, the GeForce GTX 1080. Based on their new Pascal architecture and built on TSMC’s 16nm FinFET process, the GTX 1080 is being launched as the first 16nm/14nm-based …

G.Skill Unveils New Trident Z DDR4: Five New Colors

G.Skill Unveils New Trident Z DDR4: Five New Colors

G.Skill has introduced new additions to its Trident Z family of DDR4 memory modules, which are designed to simplify the lives of anyone who wants to color-coordinate their PC. The new Trident Z lineup includes memory sticks with five new color schemes…